registermaps register layout tool

The registermaps tool allows the generation of VHDL and Python code, and HTML documentation, from an XML register description format.

Contents:

• XML Register Description Format
  • Summary
  • Using the Tools
  • XML Specification
• Output Formats
  • Basic HTML Output
  • Basic VHDL Output
  • AXI4-Lite VHDL
  • WISHBONE (Registered Termination)
  • WISHBONE (Asynchronous Termination)
  • Basic Python Output
  • Highland XML
  • Text Tree Output
• registermaps Concepts
  • Summary
  • Parsing the Input
  • Generating the Output
• registermaps API info
  • Space API
  • Visitor API
  • XML Parser API
  • Output APIs

Indices and tables

• Index
• Module Index
• Search Page